Digital-Based Interleaving Control for GaN-based MHz CRM Totem-pole PFC
The totem-pole bridgeless power-factor-correction (PFC) circuit is becoming popular. This is attributed to the emerging high voltage gallium-nitride (GaN) devices. The soft switching operation is important in order to achieve a very high MHz frequency operation for 600V GaN devices. Critical conduction mode (CRM) is the simplest way to achieve soft switching; and when applied to a boost-type PFC circuit, it is easy to achieve a good power factor with a CRM operation.
A 1.2kW 1-3MHz GaN-based CRM totem-pole PFC was built with close to 99% peak efficiency and more than 200W/in3 power density. In addition, the MHz impact of the PFC is not limiting but has an even more significant impact on the input filter design. According to a previously published paper, when the switching frequency is higher, (e.g. above 400kHz), the filter size becomes smaller. We demonstrated that from 100kHz to 1MHz, the DM filter is simplified from 2 stages to 1 stage and the volume is reduced by 50%. It also claims that if a two-phase PFC is interleaved with a 180 degree phase shift then another 50% volume reduction is expected.
The challenge of interleaving control for a CRM PFC is that the nature of the circuit is variable frequency operation. For a given input and load condition, the frequency varies 3-5 times in a half line cycle. For different input or load conditions, the frequency range varies as well. According to literature, there are generally two categories of interleaving control methods proposed for the variable frequency CRM PFC: closed-loop interleaving and open-loop interleaving. For low frequency, both methods work well in maintaining a minimal value in the phase error. However, when the frequency is pushed 10 times higher to multi-MHz, the interleaving control becomes a new challenge.
In this research, the impact of interleaving control on a MHz CRM totem-pole PFC and DM filter is introduced at first. The performance comparison between closed-loop interleaving and open-loop interleaving for MHz totem-pole PFC is then discussed. The optimization and experimental results of open-loop interleaving is also presented. The conclusion is a less than 3 degree phase error is accomplished with open-loop interleaving and a 60MHz MCU. Finally, the stability analysis of open-loop interleaving is elaborated.